IEEE 1394b-2002 pdf download IEEE Standard for a High-Performance Serial Bus—Amendment 2
2.1 Conformance
Several keywords are used to differentiate between different levels of requirements and optionality, as follows.
2.1.1 expected: A keyword used to describe the behavior of the hardware or software in the design models assumed by thisstandard. Other hardware and software design models may also be implemented.
2.1.2 ignored: A keyword that describes bits, bytes, quadlets, octlets, or fields whose values are not checked by the recipient.
2.13 may: A keyword that indicates flexibility of choice with no implied preference.
2.1.4 reserved: A keyword used to describe objects–bits, bytes, quadlets, octlets, and fields–or the code values assigned tothese objects where either the object or the code value is set aside for future standardization. sage and interpretation may bespecified by future extensions to this or other standards.A reserved object shall be zeroed or, upon development of a futurestandard, set to a value specifed by such a standard. The recipient of a reserved object shall not check its value. The recipientof a defined object shall check its value and reject reserved code values.
2.1.5 shall: A keyword indicating a mandatory requirement. Designers are required to implement all such mandatory requirements to ensure interoperability with other products conforming to this standard.
2.1.6 should: A keyword indicating flexibility of choice with a strongly preferred alternative. Equivalent to the phrase “isrecommended.
Change the head for 2.2 in IEEE Std 1394-1995 as follows.
2.2 Technical glossary
Replace the following in 2.2 in IEEE Std 1394-1995, in alphabetical order. Replace the “x” in 2.2..x with the appropri.ate numbers:
2.2.x acknowledge packet: An 8 bit packet that may be transmitted in response to the receipt of a primary packet. The mostand least significant nibbles are the ones complement of each other.
2.2x arbitration: The process by which nodes compete for control of the bus. Upon completion of arbitration, the winningnode is able to transmit a packet or initiate a short bus reset.
2.2.x arbitration reset gap: The period of time on a Legacy bus that indicates the start of a new asynchronous arbitration fair.
ness interval An arbitration reset gap is longer than a subaction gap.
2.2.x asynchronous packet: A primary packet transmitted in accordance with asynchronous arbitration rules (outside of theisochronous period).
2.2x base rate: A data rate of 98.304 Mbit/s + 100 ppm. In a cable environment, all Legacy-capable nodes are capable ofcommunicating at this rae, and all B-capable nodes are capable of communicating at 4 * base rate.
2.2.x concatenated transaction: A split transaction comprising concatenated subactions.
2.2.x cycle master: The node that generates the periodic cycle start packet 8000 times a second
IEEE 1394b-2002 pdf download
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